ANSYS Multiphysics Solutions Are Enabled on Samsung’s Latest FinFET Technology
Customers of Samsung Foundry and ANSYS are enabled to meet low power and high performance demands of next-generation 5G, artificial intelligence (AI), high performance computing (HPC) and automotive applications thanks to Samsung Foundry’s latest certification of ANSYS’ multiphysics solutions for 5nm low power early (5LPE) process technology.
At smaller FinFET geometries, engineers face increased multiphysics challenges due to the complex interdependency of power, thermal and reliability effects. These challenges impact design convergence, affect project schedules and impede performance. Mutual customers can overcome these challenges and speed innovation by leveraging ANSYS multiphysics solutions for 5LPE process technology that enables greater area scaling and ultra-low power benefits, when compared to its 7nm predecessor.
Samsung certified the ANSYS RedHawk™ family and ANSYS Totem™ multiphysics solutions for its latest 5LPE process technology. The certification includes extraction, power integrity and reliability, signal and power grid electromigration (EM). To support multiphysics needs in advanced nodes, the certification also includes thermal analysis and signoff with self-heat and statistical EM budgeting (SEB).
“This certification empowers mutual customers to achieve stringent power, performance area and reliability requirements for 5G, AI, HPC and automotive applications,” said Jung Yun Choi, vice president of Design Technology Team at Samsung Electronics. “Using ANSYS solutions, our customers can overcome complex multiphysics challenges in advanced FinFET designs to enable silicon success.”
“With narrowing design margins in sub 7nm process nodes, guard banding becomes difficult without accurately modeling the physical, electrical and thermal effects that are prone to cause silicon failure,” said Vic Kulkarni, vice president, strategy at ANSYS. “As a leader in multiphysics simulations, we empower mutual customers to leverage best-in-class solutions to conquer the toughest power, thermal and reliability challenges to promote silicon success.”
The following ANSYS products are certified for 5LPE:
- ANSYS RedHawk: The industry’s go-to power integrity and reliability signoff solution for systems-on-chips (SoCs). With a track record of thousands of designs in silicon, ANSYS RedHawk enables users to create high-performance SoCs that are still power efficient and reliable against thermal, EM and electrostatic discharge (ESD) issues for mobile, communications, high-performance computing, automotive and IoT applications.
- ANSYS® RedHawk-SC™: The next-generation SoC power integrity and reliability signoff platform designed to enable sub-7nm design success. RedHawk-SC is built on ANSYS® SeaScape™, the world’s first custom designed big data architecture for electronic system design and simulation. ANSYS SeaScape provides per-core scalability, flexible design data access, instantaneous design bringup, MapReduce-enabled analytics and many other revolutionary capabilities. ANSYS RedHawk, the industry’s gold standard platform for SoC power noise and reliability signoff is offered on the SeaScape platform as RedHawk-SC, offering the best of both worlds — the signoff confidence provided by RedHawk and the elastic scalability and big data analytics of ANSYS SeaScape.
- ANSYS Totem: ANSYS Totem is a silicon proven layout-based analog, mixed-signal and custom circuit simulation platform for power integrity and reliability signoff. Power integrity checks include static and dynamic voltage drop analysis and the capability to account for substrate parasitic effects. Reliability checks include power and signal interconnect EM, ESD and thermal analysis covering self-heat, thermal-aware EM and SEB analysis. Additionally, Totem can generate a comprehensive chip macro model (CMM) of an IP for hierarchical modeling and simulation and for enabling easy integration and accurate analysis at the SoC level. Totem platform provides support for various design styles, including SRAMS/FLASH/DRAM, IOs and analog mixed signal designs.